Ir/em low power design engineer
SEMIFIVE · Bengaluru, India
Job Description
IR/EM Low Power Design Engineer
About Semifive
Founded in Seoul in 2019, SEMIFIVE is basing its foundation on Korea's semiconductor design competency that was amassed for more than 20 years. With expertise spanning front-end to back-end design, SEMIFIVE has become the fastest growing silicon design company that offers the most comprehensive design solutions. SEMIFIVE's core business is its innovative So C Platform that enables low-cost and high-efficiency So C design, and also provides full turnkey silicon design services for global customers.
As the cost of developing an So C and the demand for customized silicon continue to grow rapidly, SEMIFIVE's So C Platform plays a critical role in turning innovative ideas into silicon. SEMIFIVE works closely with global technology leaders and is rapidly emerging as The New Global Hub of Custom Silicon.
Semifive India Design Centre, headquartered in Bangalore, is a rapidly growing capability centre responsible for delivering complex, multi-node So C programs for global customers across the US, Europe, and Asia. The India team owns RTL-to-GDS execution, including physical implementation, timing, power, and signoff for turnkey silicon programs.
Job Summary
We are seeking a highly skilled IR/EM Low Power Design Engineer responsible for analyzing, optimizing, and ensuring power integrity and electromigration reliability in advanced semiconductor designs. The candidate will work closely with physical design, power architecture, and sign-off teams to deliver robust, low-power, high-performance So C/ASIC designs.
Experience
1-3 Years
Key Responsibilities
Power Integrity & Reliability
Perform IR Drop (Static & Dynamic) analysis to ensure robust power delivery across the chip. Perform Electromigration (EM) analysis to verify current density reliability of power and signal routing. Identify power grid weaknesses and recommend design fixes to meet sign-off criteria. Develop mitigation strategies including power grid strengthening, decap insertion, and routing optimization.Low Power Design Implementation
Collaborate with architecture and RTL teams to implement low-power techniques such as: Multi-voltage domain design Power gating Clock gating Dynamic voltage and frequency scaling (DVFS) Analyze power consumption and optimize switching activity.Physical Design Collaboration
Work closely with floorplanning and place & route teams to: Optimize power grid architecture Define power strap requirements Guide placement constraints to improve power integrity Support ECOs to fix IR/EM violations.Tool & Flow Development
Develop and maintain automated scripts for IR/EM analysis and reporting. Support sign-off flows using industry-standard EDA tools. Drive methodology improvements for power integrity and reliability verification.Qualifications
Bachelor's or Master's degree in Electrical/Electronics/Computer Engineering or related field. Strong understanding of: VLSI Physical Design flow Power distribution networks Semiconductor reliability concepts Experience with industry-standard tools such as: Ansys Red Hawk / Totem Cadence Voltus Synopsys Prime Power / Prime Rail / ICC2 Knowledge of standard cell libraries and advanced process nodes.Preferred Skills
Experience with advanced technology nodes (≤ 7nm preferred). Strong scripting skills (Python, Tcl, or Perl). Understanding of package and bump-level power integrity. Familiarity with thermal analysis and coupling effects. Ability to debug complex power-related silicon issues.Soft Skills
Strong analytical and problem-solving abilities. Effective communication and cross-team collaboration skills. Ability to work in fast-paced So C development environments.Typical Deliverables
IR/EM sign-off reports Power grid design recommendations Low power optimization strategies Design closure support documentationWhy Join Us?
At Semifive, the So C Pn R Lead plays a pivotal role in delivering first-time-right silicon. Unlike traditional large semiconductor companies where physical design roles can be narrowly scoped, Semifive offers broad ownership and real technical influence across the entire RTL-to-GDS flow.
You will work on multiple cutting-edge So Cs, partner with world-class teams across geographies, and help shape the physical design methodologies of a rapidly growing global organization.
This role offers the opportunity to define how complex silicon is physically realized at Semifive, while mentoring the next generation of physical design leaders.
Details
| Company | SEMIFIVE |
| Location | Bengaluru, India |
| Type | FULL TIME |
| Niche | tech |
| Experience | permanent |