Rfic design engineer – wireless transceiver soc (4g/5g)

What if your next circuit design powered the wireless infrastructure connecting millions of people across the globe?

At Texas Instruments, we don't just build chips — we build the backbone of modern wireless communication. Our Wireless Infrastructure team is pushing the boundaries of RF silicon at 28nm and beyond, and we're looking for an exceptional RFIC Design Engineer to join us.

Your circuits. Your IP. Real-world impact. Billions of connections.

About the Role

You'll be part of TI's Wireless Infrastructure Product Group — an elite team developing integrated transceiver So Cs for 3 G/4 G/4.5 G/AAS base station markets. Working across low-IF, zero-IF, and RF sampling architectures, you'll design high-performance RF blocks that go into products used in global telecom networks.

This isn't a maintenance role. This is a build-from-scratch, innovate-from-day-one engineering position where your ideas become patented silicon.

Our team holds 250+ granted patents. Your next innovation could be one of them.

Key Responsibilities

Design and develop RF front-end circuits including wide-band VGAs, frequency synthesizers, mixers, PPAs, and LNAs Architect and implement analog baseband signal chain blocks with focus on linearity, noise, and bandwidth Contribute to high-speed data converter design — pipelined ADCs, Sigma-Delta ADCs, and high-speed DACs Develop and optimize high-speed GHz digital front-end and signal processing datapaths Drive power optimization strategies through differentiated circuit architectures in 28nm CMOS Execute full-cycle IC design flow: schematic, simulation, layout review, silicon bring-up, and characterization Collaborate cross-functionally with digital design, systems, and verification teams Contribute to patent filings and technical publications based on novel design innovations Support silicon validation, debug, and post-silicon optimization on test benches

Required Skills

2–5 years of hands-on RFIC or analog IC design experience Proficiency in RF circuit design: mixers, VCOs, PLLs, LNAs, PAs or VGAs Strong fundamentals in analog/mixed-signal design — noise analysis, linearity, matching Experience with advanced CMOS nodes (28nm, 22nm, or equivalent Fin FET/FDSOI) Hands-on with industry-standard EDA tools: Cadence Virtuoso, Spectre, ADS, or equivalent Solid understanding of RF system specifications and their translation to circuit-level requirements Experience in transistor-level simulation and post-layout verification (PEX, LVS, DRC) Strong analytical and problem-solving skills with attention to silicon-level detail

Preferred Qualifications

Experience with transceiver So C integration for wireless communication standards Familiarity with RF sampling or direct-conversion (zero-IF) architectures Background in high-speed ADC/DAC design or mixed-signal signal chains Exposure to 3 GPP wireless standards — LTE, NR, or Massive MIMO / AAS systems Prior involvement in patent writing or IP generation M. Tech / M. S. in Microelectronics, VLSI, RF Engineering, or Electrical Engineering Published work or academic research in RF/analog IC design

Why You'll Love Working Here

Global Impact Your designs power base stations across 100+ countries

Deep Tech Focus Work on 28nm silicon with cutting-edge RF architectures

Innovation Culture 250+ patents filed — ideas are celebrated here

Career Acceleration Clear growth paths from engineer to fellow

Competitive Compensation Industry-leading salary & bonuses.

Call to Action

If you're an RF/analog IC designer — who wants to own cutting-edge silicon, file patents, and leave a mark on global wireless infrastructure — this is your stage.

Apply now