Design verification engineer — mixed-signal automotive serdes socs (5-10 yrs)

<p> About Texas Instruments </p><p> Texas Instruments (TI) is a global semiconductor company designing, manufacturing, and selling analog and embedded processing chips — powering everything from industrial automation to automotive safety systems worldwide. </p> <p> About the Team — High Speed Data Interface Product Group </p><p> The High Speed Data Interface product group focuses on the development of differentiated high-speed Ser Des So Cs targeted for automotive and industrial markets . There are two primary focus areas — Ethernet PHY and FPD-Link . </p><p> Ethernet PHY Group: A large number of applications — like in-vehicle driver alertness monitors, steering, or accelerator control in automotive and robotic applications — require an Ethernet interface. The ubiquity of Ethernet-enabled devices allows customers to simplify connecting large numbers of devices in automotive and robotic environments. Customers expect robust performance in the presence of interference and ESD events, along with processing offload capabilities. The low-cost migration from CAN to Ethernet presents unique challenges requiring interdisciplinary skills with aggressive cost and power targets. </p><p> FPD-Link Group: The proprietary FPD-Link interface addresses multi-gigabit (up to 20 Gbps) 20 Gbps) and BER performance requirements higher. Automotive functional safety requirements demand robust performance at these high data rates under challenging environments while maintaining low power consumption. </p><p> The Broader Mission: As part of this product group, you will be engaged in designing solutions spanning Analog, Digital, and Signal Processing domains to mitigate impairments such as high channel loss, ESD strikes, and narrowband interference. The team implements high-performance equalization circuits (CTLE, FFE, DFE), high-speed converters (DAC, ADC), high-speed digital front-ends, signal processing algorithms, embedded microcontrollers, and high-speed interfaces for camera and display systems. The team has successfully achieved several differentiated innovations through collaborative cross-domain optimization. </p><p> The entire product lifecycle — from product specification to customer and application support — is owned by the product group in Bangalore , giving each team member tremendous learning opportunity and enhanced scope to influence the global success of the product . We are looking for passionate, creative, and self-driven engineers who challenge traditional techniques and come up with innovative solutions to make a difference. </p><p> Role Overview </p><p> As a Design Verification Engineer , you are the last line of defense before silicon. You will lead functional, formal, and system-level verification of complex mixed-signal Ser Des So Cs — ensuring every block, subsystem, and top-level integration meets the stringent quality, safety, and performance requirements of automotive and industrial applications. </p><p> Key Responsibilities Develop comprehensive Verification Plans covering block-level, subsystem, and full-chip So C verification Build and maintain advanced UVM testbenches with constrained-random stimulus, functional coverage, and protocol checkers for Ser Des, Ethernet MAC/PHY, and embedded microcontroller subsystems Apply assertion-based verification (ABV) using System Verilog Assertions (SVA) for critical protocol and timing properties Execute formal verification (model checking, property checking) for control logic, FSMs, and safety-critical paths using tools like Jasper Gold or VC Formal Lead system-level verification of mixed-signal So C integration — incorporating analog behavioral models (Verilog-AMS / System C) for full end-to-end simulations Define, track, and close functional coverage metrics — ensuring coverage-driven verification closure across all blocks and integration levels Collaborate with design, silicon validation, and systems teams to triage and resolve functional issues through simulation and debug Ensure compliance with automotive functional safety standards (ISO 26262, ASIL-B/D) throughout the verification lifecycle Contribute to regression infrastructure , CI/CD flows, and verification methodology improvements </p><p>✅ Required Qualifications Education: B. Tech / M. Tech in Electronics / VLSI / Computer Engineering Experience: 5–10 years of design verification experience on complex digital/mixed-signal So Cs Strong proficiency in System Verilog and UVM for constrained-random verification Hands-on experience with assertion-based verification (SVA) Working knowledge of formal verification tools (Jasper Gold, VC Formal, or equivalent) Experience with functional coverage definition, measurement, and closure Strong debugging skills using industry simulators (VCS, Xcelium, Questa) </p><p> Preferred / Good-to-Have Skills Experience verifying mixed-signal So Cs using analog behavioral models (Verilog-AMS) Familiarity with automotive functional safety requirements (ISO 26262, ASIL-B/D) Knowledge of Ser Des / Ethernet PHY / FPD-Link protocol verification Background in hardware emulation (Palladium, Protium) for system-level verification acceleration Experience with regression management and CI/CD-based verification flows </p><p> What Makes This Role Unique </p><p> Critical Quality Gate You ensure zero silicon surprises in automotive-grade products </p><p> Domain Impact Your verification quality directly protects automotive safety globally </p><p> Full Lifecycle Ownership Spec → Verification → Silicon — all from Bangalore </p><p> Cross-Domain Collaboration Work with analog, digital, systems &amp; silicon validation engineers </p><p> Global Influence Shape the quality of products deployed in automotive platforms worldwide </p><p> Career Growth High-visibility role with direct impact on product success </p> <p></p> <p></p> <p></p> <p></p> <p></p> <p></p> <p></p> <p></p> <p></p> <p></p> <p></p> <p></p> <p></p> <p></p> <p></p> <p></p> <p></p> <p></p>