Senior CPU RTL Design Engineer

Minimum Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 8 years of experience in implementation of CPU cache subsystems, including load-store unit or private/shared L2/L3 designs. Experience with RTL language (e.g. System Verilog) and related design processes (e.g., Lint, UPF). Preferred Qualifications PhD in Electrical Engineering or Computer Science, or a related field. Experience leading front-end design for modern processor components or AI accelerators. Experience with ARM Instruction Set Architecture or CPU subsystems. Experience with SoC design, architecture, and integration. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power th