Senior Wafer Test Hardware Engineer, Raxium

Google · United States

Minimum Qualifications

• Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, or a specialized field (e.g., Optics, Sensors, Audio/DSP, etc.), or equivalent practical experience.
  
• 5 years of experience in writing semiconductor functional tests, including register-level writes/reads and validation on production data.
• 2 years proven experience with wafer-level probe technologies, including troubleshooting and failure analysis.
• Experience validating hardware and software paths, including step-by-step component validation (e.g., verifying pin-to-pad contact and communication).

Preferred Qualifications

• Master's degree or PhD in Electrical Engineering, Computer Engineering, Physics, or a related field (e.g., Optics, Sensors, Audio/DSP).
  
• Experience with reliability hardware bring-up and qualification.
• Experience driving hardware specifications with external equipment vendors.
• Experience with data analysis and visualization tools such as JMP, Python, or SQL.
• Proficiency in structuring semiconductor test data streams, automating data ingestion and designing data visualizations or dashboards for operational monitoring.
• Ability to lead technical projects autonomously and drive alignment across teams (Hardware, Silicon design, Data/IS, and Manufacturing).

Responsibilities

• Drive the specification process for a parallel wafer-level test tool, coordinating with internal teams on pad accommodations and initial bring-up plans.
• Define and execute the hardware/software validation path, verifying individual vendor components (such as single-die verification or pin-to-pad communication) independently from the complete solution.
• Assemble comprehensive test plans, including defining instruction sets for our unique displays.
• Define input and output data streams with vendors, and coordinate test and information systems (IS) infrastructure to manage and transfer massive die-level datasets.
• Define the operational flow, integrate the reliability tool with the manufacturing execution system (MES), and establish clear standard operating procedures (SOPs).