Immediate hiring for pd engineers ( noida & blr location)
Modernize Chip Solutions · Kanpur, India
FULL TIMEpermanent
Job Description
HI All,
I have immediate job opening for Physical design Engineers for Noida & BLR Location.
Exp - 5 to 10 yrs
Location - Noida & BLR
Notice Period - Immediate to 15 days ( Max).
JD :
Physical verification & IR analysis.- We need profiles with PDN & PDV (Redhawk and Calibre experience is mandatory) No Pure APR profiles required
We are seeking an experienced Physical Design Engineer to join our team. The ideal candidate will have strong expertise in ASIC/So C physical design flows, including synthesis, floor planning, placement, clock tree synthesis, routing, timing closure, and sign-off. This role requires hands-on experience with industry-standard EDA tools and a deep understanding of advanced technology nodes.
Key Responsibilities
• Perform RTL-to-GDSII implementation for complex So Cs or IP blocks.
• Execute floorplanning, placement, CTS, routing, and timing closure.
• Drive power, performance, and area (PPA) optimization.
• Conduct physical verification (DRC/LVS) and sign-off checks.
• Collaborate with RTL, DFT, and verification teams to resolve design issues.
• Work on multi-voltage, low-power design techniques and UPF/CPF flows.
• Support ECO implementation and tape-out activities.
Required Skills & Qualifications
• 5–12 years of experience in ASIC/So C physical design.
• Strong knowledge of EDA tools (Synopsys ICC2/Fusion Compiler, Cadence Innovus, Prime Time, Voltus, etc.).
• Expertise in timing analysis, signal integrity, and power analysis.
• Experience with advanced nodes (e.g., 16nm, 5nm).
• Familiarity with DFT insertion, low-power design, and multi-clock domain handling.
• Good understanding of physical verification and manufacturing sign-off.
• Strong problem-solving and debugging skills.
• Experience in working on Automotive or Industrial MPU/MCU So Cs (preferred for safety-critical designs and compliance with standards like ISO 26262).
Preferred Qualifications
• Experience with high-performance So Cs or complex IP blocks.
• Knowledge of EM/IR analysis and reliability checks.
• Familiarity with scripting languages (Tcl, Perl, Python) for flow automation.
Education
Bachelor’s or Master’s degree in Electrical Engineering, Electronics, or related field.
Interested candidates, Kindly share with me your updated profile to
I have immediate job opening for Physical design Engineers for Noida & BLR Location.
Exp - 5 to 10 yrs
Location - Noida & BLR
Notice Period - Immediate to 15 days ( Max).
JD :
Physical verification & IR analysis.- We need profiles with PDN & PDV (Redhawk and Calibre experience is mandatory) No Pure APR profiles required
We are seeking an experienced Physical Design Engineer to join our team. The ideal candidate will have strong expertise in ASIC/So C physical design flows, including synthesis, floor planning, placement, clock tree synthesis, routing, timing closure, and sign-off. This role requires hands-on experience with industry-standard EDA tools and a deep understanding of advanced technology nodes.
Key Responsibilities
• Perform RTL-to-GDSII implementation for complex So Cs or IP blocks.
• Execute floorplanning, placement, CTS, routing, and timing closure.
• Drive power, performance, and area (PPA) optimization.
• Conduct physical verification (DRC/LVS) and sign-off checks.
• Collaborate with RTL, DFT, and verification teams to resolve design issues.
• Work on multi-voltage, low-power design techniques and UPF/CPF flows.
• Support ECO implementation and tape-out activities.
Required Skills & Qualifications
• 5–12 years of experience in ASIC/So C physical design.
• Strong knowledge of EDA tools (Synopsys ICC2/Fusion Compiler, Cadence Innovus, Prime Time, Voltus, etc.).
• Expertise in timing analysis, signal integrity, and power analysis.
• Experience with advanced nodes (e.g., 16nm, 5nm).
• Familiarity with DFT insertion, low-power design, and multi-clock domain handling.
• Good understanding of physical verification and manufacturing sign-off.
• Strong problem-solving and debugging skills.
• Experience in working on Automotive or Industrial MPU/MCU So Cs (preferred for safety-critical designs and compliance with standards like ISO 26262).
Preferred Qualifications
• Experience with high-performance So Cs or complex IP blocks.
• Knowledge of EM/IR analysis and reliability checks.
• Familiarity with scripting languages (Tcl, Perl, Python) for flow automation.
Education
Bachelor’s or Master’s degree in Electrical Engineering, Electronics, or related field.
Interested candidates, Kindly share with me your updated profile to
Details
| Company | Modernize Chip Solutions |
| Location | Kanpur, India |
| Type | FULL TIME |
| Niche | tech |
| Experience | permanent |