Senior ASIC Physical Design Engineer – RTL2GDS, High-PPA

Google LLC · Mountain view, United States

Google is seeking a Senior Physical Design Engineer in Mountain View to drive RTL2GDS implementation for high power, performance, and area designs. You will own physical design flows from synthesis to sign-off and collaborate with hardware, software, and EDA teams to deliver packed silicon.

The role emphasizes strong expertise in Verilog/SystemVerilog, scripting (Tcl/Perl), and advanced PPA optimizations. In-person interviews are typical, and competitive compensation includes equity and benefits.