Dft lead engineer
BITSILICA · Bengaluru, India
FULL TIMEpermanent
Job Description
8 to 10+ yrs of experience in DFT architecture, scan Insertion, compression at core level and So C level.
Experience in ATPG pattern generation, coverage analysis
Experience with timing and no-timing simulations
Experience in Memory-BIST
Have understanding of SSN architecture, clock architecture, OCC
Experience in ATPG pattern generation, coverage analysis
Experience with timing and no-timing simulations
Experience in Memory-BIST
Have understanding of SSN architecture, clock architecture, OCC
Details
| Company | BITSILICA |
| Location | Bengaluru, India |
| Type | FULL TIME |
| Niche | tech |
| Experience | permanent |