Full Chip-DV Engineer

• Extensive knowledge in multiple testbench structures • Knowledge of FPGA and emulation platforms • Proficiency in UVM • PCIe/CXL support and compliance • Knowledge of assertion-based formal verification • A good understanding of the complete verification life cycle (test plan, testbench through coverage closure) • Domain knowledge in one or more of these areas: fabric, memory controller, encryption, caches, coherence, MMU, high-speed interfaces/protocols