CPU DFT Engineer

Google · United States

Minimum Qualifications

• Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience.
  
• 8 years of experience in high-performance IP or SoC Design For Test (DFT) activities and flows.
• Experience developing, deploying, and supporting DFT flows ( ATPG, Logic Vision, BIST, or JTAG).

Preferred Qualifications

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science or a related field.
  
• Experience applying AI/ML-assisted DFT design techniques for scaling and physical design closure.
• Experience with scripting in Python, Tcl, or Perl, and data mining for QoR metrics.
• Experience developing novel DFT solutions, silicon bring-up, and validation.
• Knowledge of high-performance, low-power design DFT techniques and end-to-end silicon flows.

Responsibilities

• Partner with cross-functional teams to architect, implement, and verify design-for-test (DFT) solutions for advanced CPU designs.
• Pioneer custom DFT methodologies using industry-standard EDA tools to accelerate turnaround times and test coverage.
• Develop, debug, and optimize production test patterns for automatic test equipment flows to support silicon delivery.
• Mentor peers and foster cross-functional engineering collaboration across the DFT organization.