Principal Physical Design Engineer — Chiplet SoCs

A leading chiplet startup in San Francisco is seeking a Principal Physical Design Engineer to drive the development of advanced ASICs. In this role, you will manage the entire design flow and work collaboratively with industry experts. The ideal candidate will have 8-12 years of experience in ASIC physical design, with a strong focus on power planning and clocking methodologies. This exciting opportunity offers a dynamic work environment with excellent benefits.
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