Sta/synthesis eng
Cadence System Design And Analysis · Bangalore g.p.o., India
FULL TIMEpermanent
Job Description
Synthesis for lower technologies with low power design techniques using UPF. LEC for RTL2 Gate & G2 G methodologies including low power. Func ECO Generation & FV using conformal. SDC & UPF validation. Constraints maintenance. Technical lead for multiple programs. Expert in TCL, Perl , python etc.., STA timing closure. Proficient in communication & work with cross teams/domains.
Details
| Company | Cadence System Design And Analysis |
| Location | Bangalore g.p.o., India |
| Type | FULL TIME |
| Niche | general |
| Experience | permanent |