Senior Design Verification Engineer

Hi All, ACL Digital is looking for "Senior Design Verification Engineers" Exp Level: 4+ years Notice period: Immediate to 30 days Location: Bangalore and Hyderabad Job Description: Must have good knowledge on the verification flows Excellent hands-on debug skills and problem solving attitude. Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC. Experience of working on Functional Verification, SoC Verification, Emulation Good in programming : System Verilog, PLI/DPI interface, C/C++, PERL/Shell script, assembly language OVM/UVM Methodology knowledge and experience Must have good communication skills and the ability to work in a team environment. Preferably having experience in architecture such as x86 or ARM domain based SOCs having SOC/IP performance ve