Design for Test Engineer (DFT)

Hiring for: A leading global IT Services & Consulting firm (Top 5 in India) Experienc e: 7 years to 14 yea rs Location: Bangalore Work Mode: Hybrid Notice Pe riod: Immediate to 60Days Mandatory Skills Design for Test (DFT)Scan Compression Automatic Test Pattern Generation (ATPG)Silicon Validation Roles & Responsibilities Develop and implement DFT architecture for complex SoC/ASIC designs. Design and integrate scan chains, scan compression, and boundary scan (JTAG) features. Generate and validate ATPG patterns for stuck-at, transition, and other fault models. Perform DFT verification, coverage analysis, and debug to achieve high manufacturing test coverage. Collaborate with RTL, Design, Physical Design, and Verification teams to ensure seamless DFT implementation. Support silicon bring-up,